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PCM Demultiplexor / Analyser - DMXA

02/89 to 09/89

My introduction to the equipment was via assembly of several prototype units from parts procurement through PCB assembly and test, casework construction and wiring to final system test.

I designed two of the plug-in PCBs: the IEEE488/V24 modem interface PCB and the optional Signal Frequency Measurement PCB. The latter of these PCBs proved the most demanding, with signal frequencies up to 40MHz and signal levels down to 600mVpp.

To aid Type Testing of the unit, I designed an error injection circuit for a test pattern generator - to inject known bit errors in the output data pattern.

I undertook the EMC testing of the unit, according to VDE0871.

Pattern Generator / Error Detector - PGED

My task was to verify the design of the ASIC at the heart of this equipment.

The PGED ASIC was designed on an Apollo workstation running Siemens ASIC design and simulation software. During the course of three months, I wrote a set of simulation test files and ran functional simulations in order to verify the ASIC functionality prior to first sign-off with the chosen ASIC vendor.

In undertaking the work, I gained some knowledge of various BT and CCITT specifications.